toddmaustin/mojo-v: Mojo-V: A RISC-V instruction set extension for privacy-oriented programming. Mojo-V allows programmers to write software that computes on data that no software or person can see, except the data owner. Mojo-V implements this novel form of secret computation using simple extensions to a RISC-V CPU.

Mojo-V (Pronunciation “Mojo-Five”) is a new RISC-V extension that introduces privacy-oriented programming capabilities to RISC-V. Mojo-V implements latent computation, enabling secure, efficient, and data-oblivious execution without reliance on delicate software and programmer trust. By indexing sensitive data in dedicated secret registers and encrypting memory under a third-party key, Mojo-V prevents disclosure and implements computation that is both blind (no direct disclosure) and silent (no side channel leakage). The design integrates seamlessly into the existing RISC-V ISA with only one mode bit and four new instructions, which apply solely to decode. Initial results show near-native execution speeds offering performance improvements of more than 5-7 orders of magnitude compared to fully homomorphic encryption (FHE), with a clear roadmap for integration into CPUs, GPUs, and specialized accelerators.

To know more…

Current Mojo-V ISA Extension Specification (release 0.91):

To contact the developers of Mojo-V:

Mojo-V Reference Platform Release 0.91 implements secret integer and floating-point calculations using a fixed symmetric key cipher. As of this release, 64-bit secret computation is fully secret and this initial reference platform can be used for software development and red-teaming. Additional capabilities will be introduced in future releases, including PKI support, LLVM compiler support, 32-bit RISC-V support, VIP-Bench benchmark support, etc.

Specification Version: 0.91 (October 2025)
contact: mojov-devs@umich.edu

1. Mojo-V ISA Spec v0.91
2. Spike (instruction set simulator) implementation
   • Integrated into Mojo-V riscv-isa-simalmost feature-complete
   • Only missing: Public-key infrastructure (PKI) support (currently uses fixed keys with Simon-128 cipher)
   • To run Spike when the Mojo-V extension is enabled, add --isa=rv64gc_zicond_zkmojov_zicntr running flag spike
3. mojo-v bringup-bench benchmark
   • Hand-coded examples (for example, bubble-sort) that illustrate Mojo-V’s secret calculations
   • The full battery of safety tests for the RV64GC+Mojo-V

Note, the remainder of the bringup-bench benchmarks have not yet been ported to Mojo-V.

You will need an LLVM-based RISC-V cross-compiler capable of producing RV64GC Binaries.

Here’s a good place to start: https://clang.llvm.org/get_started.html

git clone https://github.com/toddmaustin/mojo-v.git
cd mojo-v

sudo apt-get install device-tree-compiler libboost-regex-dev libboost-system-dev
cd riscv-isa-sim
mkdir build
cd build
../configure --prefix=$RISCV
make

1. create spike device driver

   cd bringup-bench/target
   make

2. configure your compiler

   edit ../Makefile and set TARGET_CC For mojov Target the location of your LVM clang-based RISC-V compiler.

3. build and test

   cd ..                # go to the top-level bringup-bench directory
   make mojov-tests     # run all Mojo-V tests

   Alternatively, you can run an individual benchmark by going to its directory and running the following command.

   cd ../mojov-test
   make TARGET=mojov clean build test

All test benchmarks are hand-coded assembly programs displaying Mojo-V ISA rules and security semantics. Other Bringup-Bench benchmarks have not yet been ported to Mojo-V.

We welcome contributions, bug reports and suggestions!

Email: mojov-devs@umich.edu
Project Home: https://github.com/toddmaustin/mojo-v